Atomic Layer Etching (ALE)

1. Fundamentals of Atomic Layer Etching

Atomic layer etching (ALE) is a technique that removes material one atomic layer at a time using sequential, self-limiting chemical reactions. First conceptualized in the late 1980s and developed as a practical manufacturing tool over the past decade, ALE has become essential for semiconductor nodes where angstrom-level precision determines device performance.

The defining characteristic of ALE is self-limitation. Each cycle consists of two half-reactions:

1. Surface modification: A reactive species modifies only the topmost atomic layer of the target material. Once the surface is fully reacted, the modification stops regardless of additional exposure time. This is analogous to the self-limiting adsorption in atomic layer deposition (ALD).
2. Modified layer removal: The modified surface layer is selectively removed while leaving the underlying material intact. This can be achieved through low-energy ion bombardment (plasma ALE) or through a second chemical reaction that volatilizes the modified layer (thermal ALE).

The etch per cycle (EPC) is determined by the thickness of the modified layer — typically 0.3 to 1.0 nanometers per cycle depending on the material and chemistry. Total etch depth is controlled digitally by the number of cycles, providing deterministic depth control at the atomic scale.

2. Thermal ALE vs. Plasma ALE

Thermal ALE

In thermal ALE, both half-reactions are purely chemical — no plasma or ions are involved. The most established approach is fluorination/ligand exchange: HF fluorinates the surface, then a metal-organic precursor (such as dimethylaluminum chloride, DMAC, or trimethylaluminum, TMA) reacts with the fluorinated layer through ligand exchange, forming volatile products that desorb from the surface.

Thermal ALE is inherently isotropic (etches equally in all directions), making it ideal for:

• Conformal etching in 3D structures
• Selective removal from complex topographies
• Damage-free processing of sensitive materials
• Gate-all-around nanosheet channel release (SiGe selective ALE)

Plasma ALE (Directional)

Plasma ALE uses a chemical modification step followed by removal via low-energy ion bombardment (typically Ar+ at 10-50 eV). The ion energy is carefully tuned: high enough to remove the modified layer but below the sputtering threshold of the unmodified material. This creates a natural selectivity between modified and unmodified surfaces.

Because ion bombardment is directional (normal to the substrate), plasma ALE is inherently anisotropic — it etches vertically but not laterally. This makes it the method of choice for:

• Pattern transfer and feature definition
• High aspect ratio etching (3D NAND, DRAM capacitors)
• Precise depth control in multilayer stacks
• Sidewall smoothing and profile correction

3. Cryogenic ALE

Cryogenic ALE represents one of the most significant recent advances in etch technology. At substrate temperatures of -60 to -110°C, the physics of surface adsorption changes dramatically. Reactive gases such as C₄F₈ physisorb onto surfaces in self-limiting monolayers rather than chemisorbing — creating a modification step that is inherently self-limiting by the physics of physisorption.

When combined with pulsed plasma for the removal step, cryogenic ALE achieves remarkable results:

The cryogenic approach also offers sustainability benefits. Lower-GWP etch gases can be used because the physisorption mechanism is less dependent on specific gas chemistry. Combined with reduced process times, cryogenic ALE can achieve substantial reductions in carbon emissions per wafer.

4. Overcoming ARDE in High Aspect Ratio Features

Aspect ratio dependent etching (ARDE) is the single biggest challenge in advanced semiconductor etching. As features become deeper and narrower, the transport of reactive species to the feature bottom is governed by Knudsen diffusion — molecular flow where the mean free path exceeds the feature width.

Recent modeling by Joubert and colleagues quantified the severity: at an aspect ratio of 100:1, the neutral radical flux at the feature bottom is just 1.3% of the incoming flux. For conventional RIE, where etch rate is proportional to flux, this means a 98.7% reduction in etch rate at the bottom compared to the top.

ALE overcomes ARDE through a fundamental mechanism change. Because both half-reactions are self-limiting, the etch per cycle depends on whether the surface reaches saturation — a question of dose (flux × time) rather than instantaneous flux. By extending the exposure time for each half-cycle, even feature bottoms receiving 1% of the surface flux can reach full saturation and achieve the same etch per cycle as the feature top.

Huard, Kanarik, and Kushner at Lam Research and the University of Michigan confirmed this through computational modeling of Cl₂/Ar ALE in 3D silicon structures: when both steps reach complete saturation, the etch per cycle is truly independent of aspect ratio.

5. Applications in Advanced Semiconductor Manufacturing

3D NAND Flash Memory

3D NAND is the primary driver for ALE adoption. Current 400+ layer devices require channel holes with aspect ratios exceeding 60:1, and 1,000-layer architectures on industry roadmaps will push toward 100:1. ALE — particularly cryogenic ALE — is the enabling technology for these extreme geometries, providing the profile uniformity and CD control that conventional RIE cannot achieve.

Gate-All-Around (GAA) Transistors

The semiconductor industry's transition from FinFET to GAA architecture at sub-3nm nodes requires the selective removal of SiGe sacrificial layers from Si/SiGe superlattices to release nanosheet channels. Thermal ALE with high SiGe-to-Si selectivity (>100:1) is essential for this step, removing the SiGe without damaging the atomically thin Si channels.

DRAM

Advanced DRAM requires deep, narrow capacitor structures and contact holes. ALE addresses the ARDE challenges in these high aspect ratio features while maintaining the sidewall verticality and bottom CD uniformity needed for reliable capacitor formation.

Advanced Packaging

Through-silicon via (TSV) etching for 3D integration and hybrid bonding surface preparation both benefit from ALE's precision. As chiplet architectures and heterogeneous integration become standard, the demand for precise, damage-free etching in packaging applications continues to grow.

6. The Market Opportunity

The ALE equipment market was valued at approximately $1.36 billion in 2025 and is projected to reach $2.74 billion by 2033, growing at a CAGR of over 9%. This growth is driven by three converging trends:

• 3D NAND scaling beyond 400 layers to 1,000+, requiring extreme aspect ratio etching
• GAA transistor adoption at sub-3nm nodes by all major logic foundries
• Advanced packaging for AI/HPC chiplets requiring precise TSV and bonding processes

Applied Angstrom Technology is positioned at the center of this transition, delivering ALE solutions that bridge the gap between atomic-scale precision and production throughput.